Austrochip 2024

The Austrian Workshop on Microelectronics (Austrochip) is an annual meeting and platform to present the latest activities in the field of micro- and nanoelectronic devices and integrated circuits in Austria and neighboring countries. The workshop is a forum for discussion and contact between academia and industry.
This 32^nd edition of the Austrochip conference is jointly organized by the Institute for Microelectronics and the Institute of Computer Engineering at TU Wien.
The confernece and the associated workshops will take place on September 25-26, 2024 at TU Wien, Vienna, Austria.

News

• March 14, 2024: Call for Papers

The Call for Papers is online. We are looking forward to many submissions!

• February 27, 2024: New Sponsor

We are pleased to announce our new Gold-level sponsor Intel.

• February 14, 2024: New Sponsor

We are pleased to announce our new Gold-level sponsor IMS Nanofabrication.

• February 13, 2024: New Sponsor

We are pleased to announce our new Bronze-level sponsor F&S BONDTEC Semiconductor GmbH.

• February 08, 2024: New Sponsor

We are pleased to announce our new Bronze-level sponsor STMicroelectronics.

• February 05, 2024: New Sponsor

We are pleased to announce our new Gold-level sponsor SMT.

• February 05, 2024: New Sponsor

We are pleased to announce our new Gold-level sponsor ARTEMES.

• January 31, 2024: New Sponsor

We are pleased to announce our new Silver-level sponsor ams OSRAM.

• January 30, 2024: New Sponsor

We are pleased to announce our new Silver-level sponsor Beyond Gravity Austria GmbH.

• January 25, 2024: New Sponsor

We are pleased to announce our new Gold-level sponsor NXP Semiconductors.

• January 24, 2024: New Sponsor

We are pleased to announce our new Silver-level sponsor x.test GmbH.

• January 23, 2024: New Sponsor

We are pleased to announce our new Gold-level sponsor IPCEI Microelectronics and Communication Technologies.

• January 22, 2024: New Sponsor

We are pleased to announce our new Gold-level sponsor Infineon Technologies Austria AG.

• October 26, 2023: Website Online

The Austrochip 2024 Website is now online. A big thank you goes to last year's team for preparing a new responsive website template.

Important Dates

Call for Papers

For the Austrochip 2024 conference authors are requested to submit an extended abstract, inclusive of representative data and figures, describing the outcomes of their research endeavors and stating their significance.

Topics

Topics of the workshop include but are not limited to

• Micro- and Nanoelectronic Devices
• Simulation of microelectronics devices and processes (TCAD)
• Device reliability characterization and analysis (Noise/RTN, BTI, SILC, TDDB)
• Robustness of power and wide bandgap devices and circuits (SiC, GaN, etc.)
• Emerging technologies and devices (SiGe, 2D materials, etc.)
• Reliability tests for monitoring and qualification (wafer-level, package-level, etc.)
• Device to circuit degradation
• Integrated Circuits
• Analog, mixed-signal, and RF integrated circuits
• Digital circuits, filters, DSPs, asynchronous designs
• FPGA design and reconfigurable hardware
• Design methodology, system-level design, giga scale circuits, network-on-chip
• Embedded systems and IoT, energy-efficient machine learning, low-power designs, RF systems, security aspects
• Verification and testing, signal integrity, compact device modeling, timing analysis, reliability simulation, EMC, ESD, radiation effects
• Quantum computing, sub-threshold circuits, sensors, organic and biomedical electronics
• Case studies and prototyping

Review Process and Proceedings

All submissions go through a double-blind review process and have to fulfill the requirements of IEEE Xplore. The accepted papers will be chosen for either oral or poster presentation based on their merit. All accepted papers will be published in IEEE explore after the conference. The committee strongly encourages contributions from both academic and industrial domains.

Submission

TBA

Submission Guidelines

• Format has to be in A4 format according to the IEEE style.
• Anonymous - remove authors, institutions, and the acknowledgment as papers will be double-blind reviewed.
• Papers should not exceed 4 pages (including bibliography and appendix).
• Papers must be written in English and submitted in PDF file format.
• Original, unpublished work - not simultaneously submitted to other workshops, conferences, or journals.

Papers not meeting these guidelines risk rejection without consideration! Austrochip 2024 reserves the right to exclude any accepted paper from distribution after the conference if the accepted paper is not presented at the conference. This means that every accepted paper needs at least one full registration for the conference.

Special Issue in Microelectronics Engineering Journal

Up to ten papers will be invited to submit an extended version of their work to the special issue Advances in Micro- and Nanoelectronic Devices and Circuit Engineering published in the Microelectronics Engineering Journal. The submission deadline for the extended papers is January 31, 2025.

Tutorials

Tutorial 1: Semiconductor Fabrication at Multiple Time and Length Scales

Abstract

The microelectronics industry has undergone significant innovation in recent years. The decades-long technology roadmap that involved planar transistor scaling has nowadays evolved into a search for optimal geometries and materials beyond silicon. With this change, circuit designers and fabrication engineers can no longer enjoy the benefits of decades of experimental information on silicon. Technology computer-aided design (TCAD) and design-technology co-optimization (DTCO) strategies need to adapt to include the search for novel materials through a multi-scale modeling approach, where the atomistic behavior of a material informs design decisions. Furthermore, with a continued reduction of design margins, process variability is becoming a significant concern. Understanding equipment-level and across-wafer variation is paramount. However, current implementations of physical deposition and etching models do not provide a direct link to equipment inputs.

This talk will discuss the current state of process simulation and emulation, and what we are currently investigating and developing to assist the microelectronics industry, which includes both semiconductor manufacturers and electronic design automation (EDA) vendors. In this tutorial, we will cover several aspects essential to modeling semiconductor fabrication. The inclusion of TCAD and DTCO during the design process has become invaluable and for these, both time-discretized physical models and quick geometric emulations have a role to play. The tutorial will also discuss how machine learning is helping merge feature-scale modeling approaches with reactor-level inputs and equipment variability. The applied method can provide semiconductor manufacturers a virtual copy of their equipment, which is directly linked to physical and empirical deposition and etching models. Ultimately, this creates a pathway towards a digital DTCO strategy for design discovery while reducing cost, time, and the environmental impact of a design cycle by reducing the heavy reliance on experimental wafer fabrication.

About Lado Filipovic

Lado Filipovic is an Associate Professor and the Director of the Christian Doppler Laboratory for Multi-Scale Process Modeling of Semiconductor Devices and Sensors at the Institute for Microelectronics, TU Wien. Lado’s research is centered around Integrated Semiconductor Sensors, Process Technology Computer Aided Design (TCAD), and the integration of artificial intelligence in TCAD. He obtained his venia docendi (habilitation) in Semiconductor Based Integrated Sensors and his doctoral degree (Dr.techn.) in Microelectronics from TU Wien in 2020 and 2012, respectively. Lado is currently heading several research projects at a wide range of technology readiness levels (TRLs) from basic research to industry applications. His research team has released several open-source scientific software tools under the ViennaTools moniker, such as the process simulator ViennaPS which is currently used for studying the fabrication of advanced nanoelectronic devices in academia and industry worldwide.

Committees

Organizing Committee

Steering Committee

Venue

Austrochip 2024 will be held at Campus Gußhaus at TU Wien. Both the conference and the workshop will take place in the EI 10 Fritz Paschke lecture hall, Gusshausstrasse 27-29, 1040 Wien.

Travel and Transportation

By Public Transport

The Campus Gußhaus is not far away from the central railway station of Vienna. From there you can take the U1 metro line in the direction of Floridsdorf for one station and exit at Taubstummengasse. It is also possible to walk, which will take approximately 20 minutes.

By Car

There are several parking garages in the vicinity of conference venue, one being directly next to the building.

Possible Hotels

Sponsors

Gold

ARTEMES

IMS Nanofabrication

Infineon Technologies Austria AG

Intel

IPCEI Microelectronics and Communication Technologies

NXP Semiconductors

SMT

Silver

ams OSRAM

Beyond Gravity Austria GmbH

x.test GmbH

Bronze

F&S BONDTEC Semiconductor GmbH

STMicroelectronics

Technical

IEEE Austria Section